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doi:10.2204/iodp.pr.341S.2013

Appendix A

ERS-MFTM-SCIMPI bench tests

After encountering performance problems with the ERS in February 21013 during the preliminary bench tests, the system was successfully tested at Lamont-Doherty Earth Observatory in April 2013 using a 19,000 ft long seven-conductor wireline. However, several problems were encountered during the port call and transit when bench testing the system that was going to be used for deploying SCIMPI in Hole U1416A. Below is a description of the problems and the results.

Multi-Function Telemetry Module (MFTM)

Baud rate problems were encountered between the uphole monitoring SCIMPI laptop and the surface panel as well as between the SCIMPI data logger and the MFTM. After investigating the problems, the laptop baud rate was set to 115200 kbps and the communications between SCIMPI and MFTM was set to 9600 kbps. In addition, a voltage regulator was installed in both MFTM tools because the 5V power supply to the modem was not able to maintain the necessary voltage over the longer shipboard wireline cable (~29,000 ft). All of these issues were resolved before leaving Victoria, and the entire SCIMPI string was successfully tested over the wireline after producing a continuous data stream without problems.

Electronic RS (ERS) Overshot

Bench testing also encountered several problems with the ERS tools after cycling the tools several times between the latching and unlatching positions. The ERS1 motor would not retract to the unlatching position, whereas initial tests with the ERS2 motor were successful while cycling approximately eight times between latching and unlatching positions. USIO-LDEO and Schlumberger (SLB) personnel took apart the ERS1 motor and electronics sections for diagnosing the problem. Tests showed that the motor worked well in both directions when direct power was being applied but the voltage on the electronics section dropped to ~14V under a load and this was not sufficient for operating the motor. This pointed to a problem with the electronics section on ERS1.

After an initial assessment of the electronics section on ERS1, the field effect transistor (FET) control board was redesigned with a pair of mechanical relays such that two switches were dedicated, one for forward (latching) and the other for reverse (unlatching) operations. This improved the output voltage by a few volts, allowing the motor to turn on the bench, which was a problem before, but the motor still stalled when it was attached to the mechanical section of the tool. A closer inspection of the ERS1 power supply section revealed that the Vicor (DC-DC converter) did not have the required capacitors as stated in the data sheet from the manufacturer. Installing capacitors found onboard, which were in the approximate required range, increased the voltage to a range between 19 and 20V, which was enough to operate the motor while installed in the mechanical assembly. In addition, a current-limiting resistor that was in the original board was removed because it was no longer necessary with the new relay switch configuration, and this last step increased the total operating motor power to ~22.5V. The final result was that the modified ERS1 electronics section was then responsive and operational in both directions with a far more consistent stroke time.

The final bench test consisted of connecting the shipboard seven-conductor wireline cable, SLB cablehead, MFTM, the modified ERS electronics cartridge, the ERS motor and latching sections, the SCIMPI data logger, and nine SCIMPI modules comprising the entire 250 m SCIMPI assembly that was going to be deployed. The results showed consistent latching and unlatching operations in ~1 min and 50 s during six iterations, as well as reliable communications with the SCIMPI data logger displaying correct formats in the uphole computer for all the modules.

After these successful tests, modifications to the second ERS tool were also performed. These included adding capacitors to keep the Vicor’s voltage at the required level while keeping the rest of the FET board intact.

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